Item Details

Rapid Prototyping of CMP Floorplans: A Technical Report

Faust, Gregory; Meyer, Brett; Skadron, Kevin
Format
Report
Author
Faust, Gregory
Meyer, Brett
Skadron, Kevin
Abstract
The Computer Architecture literature is now replete with papers concerned with the change in architectural direction from ever more complex single cores to single chip multi-core designs. Along with this opportunity come major challenges. Among them is the sheer size of the space of possible designs. The investigation of this space is far from complete. What is needed to aid in this task is an integrated suite of tools that provides support throughout the design life-cycle, from early prototyping to final design. Here we present a floorplan tool targeted towards early prototyping of pre-RTL CMP design concepts. As such, it acts as a complement to traditional floorplan tools that are more appropriate later in the design process. Early phase CMP design investigations into the distribution of power and temperature, pin allocation, core/cache cluster size, and NoC design trade-offs are examples of experiments that can benefit from CMP layout information without many of the design details needed to drive a traditional floorplanner. We use two such studies to validate the benefit of the tool in rapid prototyping. The floorplan is specified using a model similar to that supported by GUI toolkits such as Java Swing or Windows Presentation Foundation. The floorplan design is comprised of a hierarchy of components placed within containers that provide a variety of layout services. These services include support for geographic hints for component placement, generalized grid layouts, and other layout algorithms. The tool can also be integrated with other tools in the suite by absorbing area information from tools such as McPAT, and producing output for ingestion by tools such as HotSpot. In addition, the current services can act as the basis for building more specific layout algorithms such as those targeting a certain type of NoC configuration, cache partitioning strategy, or SIMD design. Finally, the architecture is flexible enough to allow for the inclusion of a traditional floorplan tool such as ParquetFP to support detailed floorplanning once enough design information is available. This tool, which we call ArchFP, can be downloaded from http://lava.cs.virginia.edu/archfp.
Language
English
Date Received
20130809
Published
University of Virginia, Department of Computer Science, 2012
Published Date
2012
Collection
Libra Open Repository
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