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Fast Interpretation of Instruction Sets: Implementation and Applications

Davidson, Jack
Format
Report
Author
Davidson, Jack
Abstract
This paper describes a technique for building a fast interpreter to emulate an arbitrary machine's instruction set. The interpreter is automatically constructed from a specification of the instruction set. The instruction set is described by a machine description language based on ISPS, but is at a sufficiently high level that nonessential detail may be omitted. This same language has also been used to simplify the construction of retargetable compilers. The machine description language along with automatically constructed interpreters and retargetable compilers provides a set of tools that can be used to design and evaluate proposed and existing instruction sets, generate address traces for use in the design and evaluation of memory systems, facilitate testing and debugging of software, and automatically build high - leve1 language interpreters. This paper describes the machine description language, the construction of the interpreters, and the use of the interpreters in the above applications. Note: Abstract extracted from PDF file via OCR
Language
English
Date Received
2012-10-29
Published
University of Virginia, Department of Computer Science, 1985
Published Date
1985
Collection
Libra Open Repository
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