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Data Cache Performance When Vector-Like Accesses Bypass the Cache

Nahas, Michael; Wulf, William
Format
Report
Author
Nahas, Michael
Wulf, William
Abstract
A Stream Memory Controller, when added to a conventional memory hierarchy, routes vector-like accesses around the data cache. A memory system was simulated under these conditions and the data cache performance increased dramatically. The gain in performance was a result of the increased temporal locality of the access pattern. The access pattern also showed a decrease in spatial locality, making smaller cache lines nearly as effective as long ones.
Language
English
Date Received
2012-10-29
Published
University of Virginia, Department of Computer Science, 1997
Published Date
1997
Rights
All rights reserved (no additional license for public reuse)
Collection
Libra Open Repository

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