Item Details

A Design Environment for Counterflow Pipeline Synthesis

Childers, Bruce; Davidson, Jack
Format
Report
Author
Childers, Bruce
Davidson, Jack
Abstract
The Counterflow Pipeline (CFP) organization may be a good target for synthesis of application-specific microprocessors for embedded systems because it has a regular and simple structure. This paper describes a design environment for tailoring CFP's to an embedded application to improve performance. Our system allows exploring the design space of all possible CFP's for a given application to understand the impact of different design decisions on performance. We have used the environment to derive heuristics that help to find the best CFP for an application. Preliminary results using our heuristics indicate that speedup for several small graphs range from 1.3 to 2.0 over a general-purpose CFP and that the heuristics find designs that are within 10% of optimal.
Language
English
Date Received
20121029
Published
University of Virginia, Department of Computer Science, 1998
Published Date
1998
Collection
Libra Open Repository
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