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Gate Overdrive With Split-Circuit Biasing to Substitute for Body Biasing in FinFET and UTB FDSOI Circuits

Whetzel, Andrew
Thesis/Dissertation; Online
Whetzel, Andrew
Stan, Mircea
Body Biasing (BB) in bulk CMOS is an important tool for circuit designers as it allows for dynamic modulation of device threshold voltage post-fabrication. The ability to modulate device threshold voltages has many advantages. A higher threshold voltage results in lower standby power, while a lower threshold voltage results in increased performance. Threshold modulation allows different power and performance modes to meet both energy and throughput constraints. BB may be used to reduce the impact of process variations by adjusting nMOS and pMOS thresholds independently to maximize performance given a power constraint. Fully-depleted silicon-on-insulator (FDSOI) FETs such as ultrathin body (UTB) devices may benefit from a similar effect to BB when the buried oxide (BOX) is thin enough to allow the back plane potential to affect the accumulation or inversion in the channel. However, when the BOX is thick the back plane potential has very little effect on the channel, eliminating the ability to modulate threshold voltage via back plane biasing (BPB). Similarly, FinFETs benefit very little from controlled body effect because the gate has virtually full control over the channel while the body potential has none. In this thesis a new circuit topology is presented which substitutes for body biasing without relying on the body effect. The inputs, outputs, and supply rails are split in such a way that the gates of some devices may be overdriven without increasing voltage swing, resulting in a higher Ion and reduced latency under forward bias. Under reverse bias this topology drives VGS below 0 V, thereby reducing leakage current. Through SPICE simulations of a 28nm FDSOI technology a speedup of up to 21% has been realized under forward bias with an increase in power of 27%, while static power can be reduced by up to 43% with a 19% decrease in performance.
University of Virginia, Department of Electrical Engineering, MS (Master of Science), 2015
Published Date
MS (Master of Science)
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